1. Field of the Invention
This invention relates to a capacitor structure in a semiconductor memory cell using a ferroelectric thin film and a method for fabricating such a capacitor structure. More particularly, the invention relates to a capacitor structure in a semiconductor memory cell made of a nonvolatile memory cell using a ferroelectric thin film (so-called FERAM) or DRAM, and a method for fabricating such a capacitor structure.
2. Description of the Related Art
Along with the recent progress in film-making technologies, active studies are being made for applications of non-volatile memory devices using ferroelectric thin films. Nonvolatile memory utilizes high-speed polarization inversion and residual polarization in a ferroelectric thin film to enable high-speed rewriting. Nonvolatile memory devices using a ferroelectric thin film currently under studies can be classified into two systems, one for detecting changes in amount of stored charge in the ferroelectric capacitor and the other for detecting changes in resistance of the semiconductor by spontaneous polarization in the ferroelectric film. The semiconductor memory cell intended by the present invention belongs to the former system.
A nonvolatile semiconductor memory cell of the system relying on detecting changes in amount of stored charge in the ferroelectric capacitor is basically made of a ferroelectric capacitor and a select transistor. The ferroelectric capacitor is made up from, for example, a lower electrode, an upper electrode and a ferroelectric thin film sandwiched between the electrodes. Data writing and reading in the nonvolatile memory cell of this type are effected by using P-E hysteresis loop of the ferroelectric element as shown in FIG. 1. When an external field applied to the ferroelectric film is removed, spontaneous polarization occurs in the ferroelectric film. Residual polarization of the ferroelectric film exhibits +P.sub.r when a plus external field is applied, and -P.sub.r when a minus external field is applied. The state where the residual polarization is +P.sub.r (D in FIG. 1) is referred to as "0", and the state where the residual polarization is -P.sub.r (A in FIG. 1) is referred to as "1".
In order to distinguish the state of "1" or "0", a plus external field, for example, is applied to the ferroelectric thin film. Then, polarization of the ferroelectric film exhibits the state of "C" of FIG. 1. In this case, if data is "0", then the state of polarization in the ferroelectric thin film changes from D to C. On the other hand, if data is "1", the state of polarization in the ferroelectric thin film changes from A through B to C. When data is "0", polarization inversion of the ferroelectric thin film does not occur. When data is "1", polarization inversion occurs in the ferroelectric thin film. As a result, a difference is produced in amount of stored charge of the ferroelectric capacitor. By activating the select transistor of a selected memory cell, the stored charge is detected as a bit-line potential. When the external field is changed to 0 after reading data, the state of polarization in the ferroelectric thin film is changed to state D of FIG. 1 regardless of data being "0" or "1". Therefore, when data is "1", a minus external field is applied to produce state A through D and E so that data "1" be written reliably.
A sort of such nonvolatile memory (stacked nonvolatile memory) is taught by S. Onishi, et al. in the literature "A Half-Micron Ferroelectric Memory Cell Technology with Stacked Capacitor Structure", IDEM 94-843. A schematic fragmentary cross-sectional view of the nonvolatile memory cell taught in the literature is shown in FIG. 2.
In the nonvolatile memory cell having the structure shown in the literature, the top surface of the ferroelectric thin film is partly covered by an insulation film, the area of the upper electrode in contact with the ferroelectric thin film is small. That is, the effective capacitor area is small, and the amount of stored charge is small. Therefore, it is desirable to cover the entirety of the top surface of the ferroelectric thin film with the upper electrode as schematically shown in FIG. 3 in a fragmentary cross-sectional view. In this case, however, field concentration occurs at corners of the lower electrode. It causes a distortion of the P-E hysteresis loop shown in FIG. 1 or an increase in leak current, and the existence of corners of the lower electrode invites a deterioration of the capacitor structure.